Thursday 29 December 2016

Design Rules of Crystalline Silicon 2

Continuing from Design Rules of Crystalline Silicon 1:


The metal contacts grid on solar cells is as shown in the diagram above.  The main conduit in the centre is called the busbar, with fingers going from the busbar to the edge of the solar cell.  The resistance of the fingers is also in the diagram, where ρ is the electrical sensitivity of the metal, and L, W and H are the length, width and height of the finger.  If this series resistance is high, the fill factor of the solar cell will be reduced.


As seen in the diagram above, the red colour electron can move in the spacing distance S between 2 fingers.  Since the emitter has higher resistivity than the metal contact, the power loss due to the emitter resistivity scales with finger spacing to a power of 3.

It must be noted that if there are more metal finger contacts, there will be more shading of the solar cell.  Shading means that light cannot reach the solar cell.  Hence, while having more metal fingers will lead to less loss of power generated, there cannot be too many fingers with widths too wide to block the light from the solar cell.

Similar occurences happen at the back contacts - the back surface of the solar cell.  Holes are collected at the back contact, but since electrons are the only charge carriers in metals, the holes will recombine with electrons from the back contact at the contact interface.  The distance between the p-n junction and the back contact should not be more than the average diffusion lengths of minority electrons in the p-layer.


However, defects at the metal-semiconductor interface of the back contact will still lead to SRH recombinations.  Hence, the area of the interface should be reduced by making point contacts (see diagram above).  The rest of the rear interface should be covered by an insulating passivation layer like the front surface.


In addition, a back surface field should be created by heavily p doping the point interfaces of the back contact (see diagram above).  This will create an additional space charge region at the interface that acts like a p-n junction, preventing minority electrons from moving from the p-layer to the p++ back contact region.  Hence, there is higher minority electron density in the p-layer.



Reference:
4.3 Design Rules of Crystalline Silicon, Delft University of Technology, https://www.youtube.com/watch?v=qmbrGk-c-P8

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